CPLD-based DSP and sound card interface technology

1 Introduction

The use of Complex Programmable Logic Devices (CPLDs) improves system integration, reduces noise, enhances system reliability, and reduces cost. It not only has electrical erasure characteristics, but also features advanced features such as edge scanning and in-circuit programming. State machine, synchronization, decoding, decoding, counting, bus interface and many other aspects are also very active in the field of signal processing. The MAX7000 series is a high-performance, high-density CPLD [1] manufactured by ALTERA using advanced 0.8μm CMOS EEPROM technology. The structure of the MAX7000 fully mimics the TFL and integrates the logic functions of SSI, MSI, LSI and traditional PLDs with high density. The EPM7128S is a high-density device in the MAX7000 series. It has 128 logic macrocells and a maximum of 100 inputs. It has in-system programming (ISP) features and is ideal for logic-intensive, control-intensive systems where input and output are more demanding. Using the EPM7128S in the interface circuit of the DSP and ISA bus sound card not only makes the overall system volume significantly reduced, but also the hardware failure rate is significantly reduced, and the debugging work becomes very easy. The interface principle of DSP and ISA bus sound card The working principle of sound card Figure 1 shows the basic working principle of the sound card: the host sends the digitized sound signal to the digital-to-analog converter (D/A) via PCM to change the digital signal. It is an analog audio signal; at the same time, the input signal of the microphone or CD can be converted into a digital signal by an analog-to-digital converter (A/D) and sent to a computer for various processing. Please refer to the relevant materials and manual for the hardware structure of the actual specific sound card.

2.2WSS compatible sound card and ISA bus hardware interface

WSS is an audio subsystem standard defined by Microsoft Corporation for multimedia extensions in the Windows environment for the purpose of unified sound card standards and convenient applications. It includes hardware platform and software interface. The hardware structure of this type of sound card mainly includes sound processing chip/group, power amplifier, bus connection port, input and output port, MIDI and joystick interface, CD audio connector and so on. According to the actual needs, only need to understand the interface signal and timing requirements of the sound card and ISA bus. To achieve direct DSP operation on the sound card, the DSP system must provide the above ISA bus signals.

The DSP generally provides a data signal line, an address signal line, an IO read/write signal line, and a READY signal line, and has a plurality of interrupt input pins, but does not directly have a DMA function pin, which is between the DSP and the sound card. The interface brings inconvenience, which is exactly what the author wants to solve.

2.3 TMS320C2XX DMA using HOLD operation

TMS320C2XX [~ The key to achieve DMA function is that this type of chip provides two signal pins: HOLD/INTl and HOLDA. The HOLD operation process controlled by these two signals is:

(1) HOLD, the external device can drive this pin low to request control of the external bus. This will trigger an interrupt if the HOLD/INTl interrupt line is enabled.

(2) HOLDA, in response to the HOLD interrupt, the software logic can cause the processor to issue a HOLDA response signal indicating that it will relinquish control of its external bus. According to Bai Z圃5 5, the external address signals (A15~A0), data signals (D15~D0) and memory control signals (P5, DS, BR, STRB, R/W, RD, WE) are set to high impedance state. .

It can be seen from (1) and (2) that the HOLD operation of C2XX allows direct memory access to external programs, data, and I/O space, but this function is implemented in the INTl interrupt program, and thus the interrupt line INTl is degraded. Both the edge and the rising edge should be sensitive. When C2XX detects a falling edge, it completes the current instruction being executed and then forces program control to go to the interrupt service routine, which executes the IDLE instruction. According to IDLE, HOLDA becomes active and the external bus is placed in a high impedance state. The CPU exits the IDLE state only after detecting a rising edge on the HOLD/INT1 pin, HOLDA becomes inactive, and the external bus returns to the normal state.

From the above analysis, we can see the difference between the DMA operation of C2XX and the DMA operation in the PC. In the PC, after receiving the DMA request signal, the CPU forces the CPU to tristate its address, data, and partial control pins after the current bus cycle ends, thereby giving control of the bus and giving a DMA. Response signal; after the DMA operation is completed, the CPU resumes control of the system bus after the DMA request signal is invalid. In C2XX, the DMA request signal will cause a C2XX interrupt. A software instruction is issued in the interrupt program to make the C2XX signal pins tri-stated, and a DMA response signal is also given. After the DMA operation is completed, the C2XX detects the DMA. After the request signal is invalid, although the bus returns to the normal state, the C2XX is still in the interrupt routine. From the above analysis, although the interrupt needs to protect the breakpoint and the scene, the processing speed of the C2XX DMA is much lower than that of the PC, but after all, the C2XX also implements the DMA operation, so that the sound card can be realized by the DMA controller 8237. DMA operation access [4].

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