**0 Preface**
With the rapid advancement of wireless communication technologies, a variety of standards such as Bluetooth, GSM, WiFi, and ZigBee have emerged. These technologies operate across a wide frequency range, from hundreds of MHz to several GHz. In terms of cost and performance, RF chips with wide tuning ranges and high reliability are highly valuable, making them a key focus in current wireless communication system design. The voltage-controlled oscillator (VCO), which is the core component of an RF transceiver, directly affects the overall performance of the chip. As multi-standard communication systems become more prevalent, VCOs must meet higher demands: a broader tuning range and lower phase noise. For example, Reference [1] presents a CMOS LC VCO with a tuning range of 4.39–5.26 GHz, power consumption of 9.7 mW, and phase noise of –113.7 dBc/Hz at a 1 MHz offset. Another study [2] introduces a CMOS VCO with a quadrature coupling structure, offering a tuning range of 3.6–4.9 GHz, 8 mW power consumption, and –114 dBc/Hz phase noise at 1 MHz. To address issues like limited bandwidth and high phase noise, this paper presents a 0.35μm SiGe BiCMOS differential LC VCO designed for improved performance.
**1 LC VCO Circuit Design**
**1.1 Low Phase Noise VCO Design**
Phase noise is a critical parameter for VCO performance, defined as the ratio of noise power to signal power at a given frequency. The Leeson equation is commonly used to analyze it:
$$ L(\Delta \omega) = 10 \log\left( \frac{FkT}{P_s} \cdot \left( \frac{\Delta \omega_1}{\Delta \omega} \right)^2 + \frac{1}{Q_L^2} \cdot \left( \frac{f_0}{\Delta \omega} \right)^2 \right) $$
Where $ F $ is the empirical factor, $ k $ is Boltzmann’s constant, $ T $ is temperature, $ P_s $ is signal power, $ \Delta \omega $ is the frequency deviation, $ f_0 $ is the oscillation frequency, and $ Q_L $ is the quality factor of the LC tank. Phase noise mainly comes from thermal and flicker noise. Symmetrical signal waveforms help reduce flicker noise, and differential structures ensure waveform symmetry. A higher $ Q_L $ improves phase noise performance by sharpening the resonance peak, reducing external interference. High-Q on-chip inductors are essential, and MEMS-based spiral inductors offer better performance due to reduced losses and 3D structures. Simulations using HFSS showed an inductance of ~1.04 nH and a Q value of ~11.3 at 4 GHz. Thermal noise is also important, especially at higher frequencies. Tail current adjustment is crucial—too low can cause instability, while too high increases noise. Optimal transconductance design ensures sufficient signal swing without excessive noise.
**1.2 VCO Circuit Structure**
The designed LC VCO uses a cross-coupled PMOS structure (M1, M2) for negative resistance and a tail current mirror (M3, M4, IBl). PMOS is preferred for lower flicker noise. The LC tank includes inductors L1–L4, capacitors, and MOS varactors (CV). A capacitor switch array allows multi-band operation, controlled by three NMOS transistors. When UC1,2 is high, the capacitor is on; when low, it's off. Inductor switching via M5 and M6 further expands the tuning range. CV offers a wider, more monotonic tuning range than traditional varactors, with a voltage range of 0–3.3 V and capacitance from 0.7 to 1.4 pF. Output buffers (Q1, Q2) use BJTs for better drive capability. The layout minimizes parasitics, with thick metal layers to suppress capacitance and improve symmetry. This design enhances stability and reduces noise interference.
**2 Fabrication and Measurement Results**
The VCO was fabricated using a 0.35μm SiGe BiCMOS process, with a chip size of 1.2×1.4 mm. Layout optimization reduced parasitic effects and improved waveform symmetry. The process was carried out in Jiangsu’s Electrical and Electronics Engineering Lab. Testing involved connecting the chip to a PCB, soldering off-chip components, and measuring output via SMA connectors. The oscilloscope displayed waveforms and frequency parameters. Six bands were measured: 1.9–2.1 GHz, 2.1–2.4 GHz, 2.4–3.0 GHz, 3.0–3.4 GHz, 3.4–4.2 GHz, and 4.2–5.7 GHz. At 2.4 GHz, the VCO had a phase noise of –111.64 dBc/Hz, slightly better than previous works. The core current was ~1.8 mA, and startup delay-power product was 355.6 pJ, showing improved speed and efficiency.
**3 Conclusion**
This paper presents a 0.35μm SiGe BiCMOS differential LC VCO with multi-band and low-noise capabilities. The design incorporates switched capacitors and inductors for wide tuning, optimized negative resistance, and high-Q MEMS inductors. Layout improvements reduced parasitics and enhanced stability. Compared to existing designs, this VCO offers better phase noise, broader frequency range, and lower power consumption, validating its effectiveness for modern wireless applications.
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