**0 Preface**
With the rapid development of wireless communication technologies, various standards such as Bluetooth, GSM, WiFi, and ZigBee have emerged. These technologies operate across a wide range of frequencies, from hundreds of megahertz to several gigahertz. When considering application cost and performance, RF chips with wide tuning ranges and high reliability are highly valuable, making them a focal point in current wireless communication system design. The voltage-controlled oscillator (VCO), as a core component of RF transceivers, directly influences the quality of the RF chip. With the increasing demand for multi-standard communication systems, VCOs must meet higher performance requirements, including a wider tuning range and lower phase noise. Reference [1] presents a gain-adjustable CMOS LC VCO with a tuning range of 4.39–5.26 GHz, consuming 9.7 mW of power, and achieving a phase noise of -113.7 dBc/Hz at a 1 MHz offset. In [2], a CMOS VCO with a quadrature coupling structure is introduced, offering a tuning range of 3.6–4.9 GHz, 8 mW power consumption, and a phase noise of -114 dBc/Hz at 1 MHz offset. To address the limitations of narrow bandwidth and high phase noise, a 0.35 μm SiGe BiCMOS differential LC VCO was designed.
**1 LC VCO Circuit Design**
**1.1 Low Phase Noise VCO Design**
Phase noise is a critical performance metric for VCO circuits and is typically defined as the ratio of noise power to total signal power at a given frequency. The Leeson model is commonly used to analyze phase noise:
$$
L(\Delta \omega) = 10 \log \left[ \frac{FkT}{P_s} \left(1 + \frac{\Delta \omega_1}{\Delta \omega} \right)^2 \left(1 + \frac{\omega_0}{Q_L \Delta \omega} \right) \right]
$$
Where $ F $ is an empirical factor, $ k $ is Boltzmann’s constant, $ T $ is the absolute temperature, $ P_s $ is the signal power, $ \Delta \omega $ is the frequency deviation, $ \Delta \omega_1 $ is the flicker noise angular frequency, $ \omega_0 $ is the oscillation frequency, and $ Q_L $ is the quality factor of the LC tank. Phase noise is primarily composed of thermal and flicker noise. Flicker noise is influenced by the symmetry of the VCO waveform. A differential structure ensures symmetrical output, which helps reduce phase noise. The phase noise is inversely proportional to the square of $ Q_L $. Higher-Q on-chip inductors are preferred to improve selectivity and suppress external interference. MEMS-based spiral inductors offer better performance due to reduced loss and improved three-dimensional structures. They are compact, low-power, and easy to integrate. Simulations using HFSS show that at 4.0 GHz, the inductor has an inductance of about 1.04 nH and a Q value of approximately 11.3. For modern systems requiring higher frequencies, managing thermal noise becomes essential. Increasing the tail current can raise thermal noise, but reducing it too much may cause instability. Therefore, optimizing the transconductance of the negative resistance circuit ensures sufficient oscillation amplitude without excessive noise.
**1.2 VCO Circuit Structure**
The designed LC VCO circuit topology is shown in Figure 1(a). M1 and M2 form a cross-PMOS structure, acting as a negative resistance element. M3, M4, and IBl create a tail current mirror. PMOS is often used to minimize 1/f noise, as it has a lower flicker noise corner frequency than NMOS. L1 to L4, CV, M5, M6, and capacitors form the LC tank. Figure 1(b) shows the internal structure of the capacitor switch array, where C1 and C2 are variable capacitors controlled by three NMOS transistors. When UC1,2 is high, the capacitors are active; otherwise, they are off, enabling multi-band operation. Additionally, two NMOS transistors (M5 and M6) control inductor switching. When UL is high, the inductors are shorted, and when low, they are open, allowing for broader band switching. CV is a MOS capacitor with a larger tuning range and better monotonicity compared to varactors, with a tuning voltage of 0–3.3 V and capacitance ranging from 0.7 to 1.4 pF. Q1 and Q2, along with constant current sources IB2 and IB3, serve as an output buffer. Using SiGe BiCMOS technology enhances the buffer’s speed and driving capability while reducing noise interference from the external circuit.
**2 Fabrication and Measured Results**
The VCO was fabricated using a 0.35 μm SiGe BiCMOS process with a highly doped substrate to minimize latch-up effects. The chip size is 1.2 mm × 1.4 mm. Layout design focused on minimizing parasitic elements and ensuring waveform symmetry. To reduce parasitic capacitance between metal layers and the substrate, the top metal layer was used directly for oscillator node connections. Thickening the metal layer helped suppress parasitic effects. A switched capacitor array was placed between the output and resistors for optimization. The fabrication was carried out in the Jiangsu Province Key Laboratory of Electrical and Electronics Engineering. Testing involved connecting the VCO to a PCB board via bonding wires, mounting it on an aluminum base, and soldering off-chip components. Oscillation signals were measured using SMA connectors and a Tektronix TDS5034B oscilloscope. The test equipment used was the domestic Huabo WS-100B. Six frequency bands were measured: 1.9–2.1 GHz, 2.1–2.4 GHz, 2.4–3.0 GHz, 3.0–3.4 GHz, 3.4–4.2 GHz, and 4.2–5.7 GHz. When all switches were off, the VCO operated continuously between 4.2–5.7 GHz. When all switches were on, the lowest frequency was 1.9–2.1 GHz. The continuous tuning range spans from 1.9 GHz to 5.7 GHz. Simulation and measurement results show that the VCO achieves a phase noise of -111.64 dBc/Hz at 1 MHz offset, outperforming previous designs. The startup delay-power product is significantly reduced, demonstrating the VCO’s efficiency and high-speed performance.
**3 Conclusion**
This work successfully implemented a multi-band, low-noise differential BiCMOS LC VCO using a 0.35 μm SiGe BiCMOS process. By employing a switched capacitor array and inductor switching, the VCO achieves a wide tuning range. The use of high-Q MEMS spiral inductors improves phase noise performance. Layout optimization minimized parasitic effects and enhanced stability. The VCO operates over six bands, from 1.9 GHz to 5.7 GHz, with a measured phase noise of -111.64 dBc/Hz at 1 MHz offset. Compared to existing literature, this design offers improved performance in both frequency range and phase noise, while maintaining low power consumption and fast startup time. This demonstrates the effectiveness of the proposed VCO in meeting the demands of modern wireless communication systems.
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